The various configurations of multilevel inverter involve the use of more numbers of switching devices, energy storage devices and/or unidirectional devices. Each switching unit necessitates the add-on driver circuit for proper functionality. Cascaded H-Bridge Multilevel Inverter requires overlapped switching pulses for the switching devices in positive and negative arms of the bridge which may lead to short circuit during the device failure. This work addresses the problems in different configurations of multilevel inverter by using reduced number of switching and energy storage devices and driver circuits. In the present approach Single Switch is used for each stair case positive output and single H-Bridge for phase reversal. Driver circuits are reduced by using the property of body diode of the MOSFET. Switching pulses are generated by Arduino Development Board. The circuit is simulated using Matlab. More so, through experimental means, it is physically tested and results are analyzed for the 5-step inverter and thereby simulation is fully validated. Consequently, cycloconverter operation of the circuit is simulated using Matlab. Moreover, half bridge configuration of the multilevel inverter is also analyzed for high frequency induction heating applications.
Multilevel inverters find applications in domestic and industrial power system. These inverters basically convert DC power from stand alone units like solar cell, fuel cell and battery into AC power. For this power conversion, multilevel inverter uses an array of power switches, DC sources and in some cases diodes/capacitors. The concept of multilevel inverter is first introduced by Baker Richard H and Bannister Lawrence H, in their work titled Electric Power Converter. They designed a system that employed a number of stages connected in cascade. Each stage includes an electrical energy source or an electrical energy storage unit and switch means adapted to bypass the energy source or storage unit, to interconnect the source or storage unit with other electrical energy sources or storage units across a load in a programmed fashion, and to reverse the direction of current flow in the load to apply, for example, a quasi-sinusoidal voltage across the load [
It allows low staircase switching frequency and also high PWM frequency [
In this paper, single switch for each step of staircase waveform generation is presented. With this arrangement S + 4 switches can produce S + 1 steps of voltages. For five steps, the proposed circuit needs only 9 switches. Driver circuits’ need for this arrangement is two. To reduce the number of driver circuits, stepped voltage is shifted to drain of the switching MOSFET. By changing the switching angle of the load bridge, cycloconvertor operation is obtained. Half-bridge single-phase inverter is analyzed for three levels in [
One of the main advantages of the multilevel inverter (MLI) is that it is able to produce low total harmonic distortion (THD) voltage waveforms. This is because the MLI is characterized by a large number of voltage vectors [
Level | Normalized Value of Voltage referring to peak | Switching angle |
---|---|---|
0 | 0 | 0 |
1 | 0.1 | 5.739 |
2 | 0.2 | 11.54 |
3 | 0.3 | 17.457 |
4 | 0.4 | 23.57 |
5 | 0.5 | 30 |
6 | 0.6 | 36.87 |
7 | 0.7 | 44.43 |
8 | 0.8 | 53.13 |
9 | 0.9 | 64.158 |
10 | 0.999 | 87.44 |
The rms value of the output voltage is given by
where m = number of levels; v = voltage of the individual cell; T = time taken to reach peak value.
For the frequency of 50 Hz and switching angle given in
Fundamental frequency = 50 Hz; Fundamental voltage = 255.3 Volts; Total Harmonic Distortion = 4.96.
When the load is inductive, total harmonic distortion slightly increases (5.68) due to the fact that the induced voltage in the inductor with time varying stepped input varies.
Fundamental frequency = 50 Hz; Fundamental current = 2.241 Amps; THD = 5.68.
The main disadvantage of cascaded H-Bridge topology is that large number of driver circuits require for gating the switches. High side switching (load connected to the source side) requires gate to source voltage greater than threshold voltage. In order to turn on the N channel MOSFET in high side switching, the gate voltage, Vg, should be greater than threshold and output.
For this purpose, high side switching requires driver circuit for each switching device. To solve this issue, voltage shifting from source to load through body diode is proposed in this paper. In n channel enhancement MOSFET, P-type body is shorted to the source terminal resulting in an intrinsic diode with anode at the source and cathode at the drain. While the MOSFET is turning off, the diode cannot conduct until it is forward biased. As the voltage across the MOSFET increases from near zero to the full input voltage Vin, it conducts the full output current. Once the diode is forward biased the current starts transferring from the MOSFET to the diode. During the reverse transition, first current is transferred from the diode to the MOSFET, and then the voltage across the MOSFET reduces from Vin to the conduction voltage drop.
and negative half cycles to the load. Since the load is connected to the source side, there is a need of driver circuits. The drain of the first MOSFET in the array holds all the staircase values due to the effect of the body diode. Hence bridge circuit is fed from drain of the first MOSFET. To avoid power loss and ensure holding of positive side staircase voltage for the period of switching, a capacitor is connected between source point and ground. Proper selection of capacitor value is necessary to ensure non distorted waveform.
Fundamental frequency = 50 Hz; Fundamental voltage = 104 Volts; Total Harmonic Distortion = 12.36.
In the Sample (also commonly known as Track) mode, the voltage on the hold capacitor (CH) follows the input signa-with a certain delay and bandwidth limitation. In the Hold mode, the capacitor is disconnected from the input signal and it is supposed to hold the voltage present before it was disconnected. In this circuit, holding capacitor operates in sample mode when switching devices ON and hold mode when switching devices OFF. The capacitor in the circuit is to hold the previous step voltage during the switching interval between the consecutive switching devices. Considering the switch off time of the MOSFET 1 msec interval is given from Arduino board.
To minimize or zero the capacitor current, the value of rate of change of voltage/msec multiplied by C value should approaches zero. The value of capacitance may ranges from 0.01 µF to 0.01µF.
Figures 12-16 show the experimental setup for the proposed five step multilevel inverter, voltage at drain of the first MOSFET with high resistance and capacitance at the source while load is connected at the drain of the first MOSFET.
Switching Device | Current rating |
---|---|
Devices in the bridge circuit | Load current |
Devices in the first and last levels | Load current |
Devices in the mid levels | Less than load current |
Circuit Components:
N Channel MOSFET 2N7000 (0.2A, 60 Volts); Capacitor 0.1 µF/100 Volts; Arduino Board for gate pulse input; 9 Volt Batter 5-No.
When resistor is connected between sources and ground, power loss occurs in it and the stepped voltage is discontinuous. When capacitor is connected, the power loss is very much less (less than 3%) and rising edge of the stepped voltage is continuous.
Cycloconverter converts ac power frequency into submultiples of power frequency by ac-ac conversion without an intermediate link. In the proposed multilevel inverter, only positive stepped sine waveform is available at the drain of the first MOSFET of the multilevel inverter. At the bridge stage, the sub multiple frequency of the base frequency generated by the single switch multilevel inverter stage could be obtained.
The induction heating power supply adopting cascaded multilevel inverter with improved quality of output voltage in induction heating power supply inverter, a harmonics control mean of output voltage by selecting switching angles were presented in [
Simulation Parameters:
Frequency 50 KHz; Inductor 2.733e−6 Henry; Coil resistance 0.1165 Ohm; Capacitor 3.7 e−6 Farad Smoothing inductor 10 mH.
This work proposes a multilevel inverter with reduced number of switches and driver circuits by using single
switch for each step and the effect of body diode in the MOSFET. The circuit is simulated and verified by experimental setup. Total harmonic distortion of voltage and current is within the limit of IEEE standard. Submultiple frequency at the H-bridge stage is obtained by simulation. A half-bridge multilevel inverter is simulated for high frequency applications.
The multilevel inverter used in ups system is based on multi-winding transformer with one primary and several output coils, thus producing several partial AC square waveforms. The inverter output stage combines these partial voltages in order to produce the sinusoidal output voltage. The multilevel inverter proposed in this work is suitable to design a multilevel inverter for ups without using multi-winding transformer and is to be tested.
Solar based single phase motor drive application using the proposed multilevel inverter is to be tested.
S. Jawahar,P. Ramamoorthy, (2016) Minimization of Switching Devices and Driver Circuits in Multilevel Inverter. Circuits and Systems,07,3371-3383. doi: 10.4236/cs.2016.710287