Based on the active coupled line concept, a novel approach for efficient signal and noise modeling of millimeter-wave field-effect transistors is proposed. The distributed model considers the effect of wave propagation along the device electrodes, which can significantly affect the device performance especially in the millimetre-wave range. By solving the multi-conductor transmission line equations using the Finite-Difference Time-Domain technique, the proposed procedure can accurately determine the signal and noise performance of the transistor. In order to demonstrate the proposed FET model accuracy, a distributed low-noise amplifier was designed and tested. A model selection is often a trade-off between procedure complexity and response accuracy. Using the proposed distributed model versus the circuit-based model will allow increasing the model frequency range.
Efficient Computer-Aided Design (CAD) of high-frequency systems is critically based on the performance of their internal component models. As the core of modern communication systems, active devices should be then carefully modeled for reliable system design. In high frequencies, when the device physical dimensions become comparable to the wavelength, the input active transmission line has a different reactance from the output transmission line [1,2], exhibiting different phase velocities for the input and output signals. Therefore, the phase cancellation due to the phase velocity mismatching will affect the device performance [
In this paper, a distributed model is proposed [
The proposed millimetre-wave Field Effect Transistor (FET) model is shown in
with
and where Vd, Vg, and Vs, are the drain, gate and source voltages, respectively, and the voltage across gate-source capacitor. Id, Ig, and Is are the drain, gate and source currents, respectively. These variables are timedependant and function of the position x along the device width. Also, Mds, Mgd, and Mgs represent the mutual inductances between drain-source, gate-drain and gatesource, respectively; In the above system, we have an extra unknown parameter, i.e., the gate-source capacitance voltage. Therefore, the following equation should be included to complete the system of equations
Similarly to the signal model proposed in the above section, a noise model can be developed based on the same concept, i.e., a set of transmission lines excited by noise equivalent sources distributed on the conductors, as shown in
where
Note that the vectors [vn] and [jn] in
To evaluate the noise sources, we considered a noisy FET subsection with gate width Δx. Thus, the unit-perlength noise correlation matrix for chain representation of the transistor (CAUPL) can be deduced as [
where < > denotes the ensemble average and + the transposed complex conjugate. According to the correlation matrix definition, we can calculate [vn] and [jn] knowing (CAUPL), to completely describe the proposed FET noise model. Indeed, by solving (9), the noise parameters of the transistor can be obtained.
Based on the transmission line circuit theory, the model impedance and admittance matrices can be expressed as
where [R], [L], [C], and [G] refer to the matrix representation of the well-known distributed circuit parameters of a transmission line namely, the resistance R, the inductance L, the capacitance C, and the conductance G, respectively. [Ytr] is accounted for the active parallel sub-section of the model. By solving the second-order differential equations of the model, its voltage and current vectors can be written as [
where
and
represent the voltage and current vectors at the transistor terminals, respectively (Here d, g, and s stand for drain, gate and source, respectively). The superscript “t” refers to the vector transpose. Let the elements of matrix [G] be the eigenvalues of [Z]·[Y] (or [Y]·[Z]) and the elements of matrices [Sv] and [Si] be the eigenvectors of [Z]·[Y] and [Y]·[Z], respectively [
The FDTD technique was used to solve the above equations. Applications of the FDTD method to the full-wave solution of Maxwell’s equations have shown that accuracy and stability of the solution can be achieved if the electric and magnetic field solution points are chosen to alternate in space and be separated by one-half the position discretization, e.g., Δx/2, and to also be interlaced in time and separated by Δt/2 [15-16]. To incorporate these constraints into the FDTD solution of the transmission-line equations, we divided each line into Nx sections of length x, as shown in
Applying the finite difference approximation to (7) gives
with
and
for the drain electrode
and
for the gate electrode
and
for the source electrodewhere k, m and n are integers. Solving these equations gives the required recursion relations
Superposing all the distributed noise sources is equivalent to a summation in (21) and (22) over the gate width for. Because of its simplicity, the leapfrog method was used to solve the above equations [13,14]. First the voltages along the line were solved for a fixed time using (21) then the currents were determined using (22). The solution starts with an initially relaxed line having zero voltage and current.
To find the noise correlation matrix for admittance representation of the transistor as a noisy six-port active network (as in
By considering
In order to determine the transistor noise parameters, we set the input voltage source as zero (Vs = 0). Referring to
Finally, the currents of the short-circuited ports can be determined as
with
The admittance noise correlation matrix of the six-port FET noise model is then equal to
The proposed approach was used to model a sub micrometer-gate FET transistor (NE710). The device has a 0.3 × 560 μm gate. The input and output nodes were connected to the beginning of the gate electrode and at the end of the drain electrode, respectively. The transistor was biased at Vds = 3 V and Ids = 10 mA. The obtained S-parameters of the transistor over a frequency range of 1-26GHz from the sliced model, the proposed fully distributed model and measurements are plotted in
As expected, our distributed model is more close to measurements than the slice model, especially at the upper part of the frequency spectrum, when the device physical dimensions are comparable to the wavelength.
To further prove the accuracy of the proposed wave approach in noise analysis, our results were successfully compared to measurements as well as to those obtained by the sliced model, highlighting the advantage of our model over this later (
To validate our proposed FET model, a three stage distributed FET amplifier was designed. In this work we considered a Pi-gate FET transistor suitable for low-noise applications. The topology of the gate and drain lines for transmission line modeling is shown in
The obtained power gain and minimum noise figure of the amplifier are shown in Figures 10 and 11, respecttively. As we observe there is good agreement between the proposed model and measurements as compared with the sliced model.
A new modeling approach for signal and noise analysis of high frequency transistors was presented. This method can accurately take into account the effect of wave propagation along the device electrodes. The promising model can be applied to solve issues related to simultaneous signal and noise analysis, as well as in modeling traveling wave FETs in which the gate width is much higher than that of a usual FET