**Circuits and Systems**

Vol.07 No.13(2016), Article ID:72125,12 pages

10.4236/cs.2016.713345

Current-Controlled CFTA Based Fractional Order Quadrature Oscillators

Tada Comedang^{1*}, Pattana Intani^{2}^{ }

^{1}Department of Electrical Engineering, Pathumwan Institute of Technology, Bangkok, Thailand

^{2}Electric and Energy Research (EER), Pathumwan Institute of Technology, Bangkok, Thailand

Copyright © 2016 by authors and Scientific Research Publishing Inc.

This work is licensed under the Creative Commons Attribution International License (CC BY 4.0).

http://creativecommons.org/licenses/by/4.0/

Received: September 22, 2016; Accepted: November 18, 2016; Published: November 21, 2016

ABSTRACT

This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order quadrature oscillators have been presented. The quadrature oscillators are constructed using three fractional capacitors of orders α = 0.5. The fractional capacitor is not available on the market or in the PSPICE program. Fortunately, the fractional capacitor can be realised by using the approximate method for the RC ladder network approximation. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. Due to high-output impedances, the proposed circuit enables easy cascading in current-mode (CM). The PSPICE simulation results are depicted, and the given results agree well with the anticipated theoretical outcomes.

**Keywords:**

Fractional Order, Quadrature Oscillator, Current-Controlled Current Follower Transconductance Amplifier

1. Introduction

Fractional calculus, the branch of mathematics that addresses non-integer order differentiation and integration, is a field that is over 300 years old. Fractional calculus gained considerable attention in the late sixties because it provides a more accurate description of real objects, and many structures found in nature can be modelled by fractals [1] . Fractional calculus addresses the generalization of differentiation and integration of non-integer orders. The rapid growth of the application of fractional calculus to the fields of science and engineering is noteworthy. The integer-order models have been used for a long time, not because they were more accurate or better, but because of their ability to solve fractional differential equations [2] . This issue has changed over the past few years as several methods of fractional derivative and integral approximation have been developed [3] [4] [5] ; therefore, fractional calculus can be used to easily model a wide area of applications. Fractional calculus plays a major role in physics [6] [7] , control systems [8] [9] [10] , signal processing [11] , and electrical engineering [12] - [17] .

Traditional differentiation takes the form, where n is an integer; however, using fractional calculus, the value of n can be a non-integer order, such as 1.1, or any other real or imaginary order. The Riemann-Liouville definition [18] [19] [20] of a fractional derivative, where, is defined as:

, (1)

and the definition of a fractional integral, where, is given as:

. (2)

where is the gamma function. One of the most frequently used definitions for the general fractional derivatives is the Caputo definition, which can be expressed as follows [21] :

. (3)

where m is an integer, such that. The Laplace transform is a very useful tool in the design and analysis of electronic circuits, transforming the circuit from the time domain to the frequency domain. This transformation is particularly useful because it allows for the analysis of circuits using algebraic rather than differential equations. The Laplace transform of (3) under zero initial conditions is given by [16] :

. (4)

where is the fractional Laplacian operator. The use of the fractional Laplacian operator allows for the design and analysis of systems using concepts from fractional calculus without having to solve the difficult time domain representations.

During the past decades, the current-mode (CM) approach has become more popular in analogue integrated circuit design due to its advantages of providing a larger dynamic range, wider bandwidth, and lower power consumption over its voltage-mode counterparts [22] . Several active CM blocks are proposed for active filters, oscillators and immittance circuit design. The CM realization of oscillators and filters using the first generation of current conveyor (CCI), the second generation of current conveyor (CCII), and many other active blocks has been reported [23] - [28] . However, a large number of passive resistors are inevitably used in these circuits (except for the resistors that support linear capacitors), which are not suitable for monolithic integration [29] . In 2009, Herencsar et al. [30] introduced a modification of the CFTA, called the current-controlled current follower transconductance amplifier (CCCFTA), in which the parasitic resistance at the input terminal is electronically tuned. The CCCFTA can be used as an active block in an analogue circuit design with a minimum number of resistors.

Sinusoidal oscillators are widely used in various applications, such as communication, instrumentation, measurement and signal processing. Particularly in communication systems, the sinusoidal oscillator is frequently used to generate the carrier signal for the modulation system [31] [32] [33] [34] , such as AM, FM, and ASK. With the use of the fractional elements, the design equations of the well-known oscillators could be generalized from the tight integer order domain to the general fractional order domain.

In this paper, a study of a generalized fractional order CCCFTA-based oscillator circuit is introduced. The general CO and FO for this oscillator are derived with the use of the RC ladder network.

2. Fractional Capacitor

A realization using Carlson’s method [15] was selected to model the fractional capacitors. The approximation of the fractional capacitors (1/s)^{1/n} was conducted using a regular Newton process. The order of these approximations increases as the number of iterations in the Newton process increases. The function used in the regular Newton process for these approximations is:

. (5)

where x is the previous iteration. Using this process to approximate a fractional capacitor when n = 2 or α = 0.5, the initial assumption x_{0} = 1 yields:

. (6)

as the first iteration approximating. The second iteration approximating is:

. (7)

The magnitude response of this approximation is provided in Figure 1, which creates an approximation of the fractional capacitor centred around the angular frequency 1 rad/s. Using the approximation of (7), the fractional Laplacian operator can be physically realized using the RC ladder network shown in Figure 2. The impedance of this RC ladder network is:

. (8)

The resistor and capacitor values for the RC ladder shown in Figure 2 can be determined by equating the terms of (7) after a CFE of (8), which, after the CFE, becomes [35] [36] [37] :

Figure 1. Magnitude response of the approximated fractional capacitor compared to the ideal fractional capacitor of impedance Z(s) = 1/s^{0.5}.

Figure 2. Approximated model for the fractional capacitor.

(9)

Then an approximate CFE with any desired capacitance (C), which is centred around any angular frequency (), by applying magnitude and frequency scaling factors to the component values in the ladder realization. The resistor and capacitor values become:

. (10)

. (11)

where and are the scaled resistor and capacitor values, respectively; R and C are the unscaled resistor and capacitor values, respectively; and is the frequency scaling factor.

The values of the resistors and capacitors used in the PSPICE simulations of the fractional order quadrature oscillators with the approximated fractional capacitors are provided in Table 1. The phase and magnitude response of the fabricated two-terminal FO capacitors are compared with the conventional capacitor, which is simulated using PSPICE and is shown in Figure 3. These values realize the approximated fractional capacitor of 40 pF with α = 0.5 centred around a frequency of 1 MHz.

3. Description of the CCCFTA

The schematic symbol and the equivalent circuit of the current-controlled current follower transconductance amplifier (CCCFTA) [30] are shown in Figure 4. The properties

Table 1. Component values to realize approximated fractional capacitor of 40 pF using RC ladder.

Figure 3. Phase and magnitude of the fractional capacitors compared with the conventional capacitor.

Figure 4. CCCFTA (a) schematic symbol and (b) equivalent circuit.

of the CCCFTA are similar to the conventional CFTA except that the input voltage of CCCFTA is not zero, and the CCCFTA has a finite input parasitic resistance R_{f} at the f input terminal, which can be controlled by the bias current I_{o} as shown below. The characteristics of the ideal CCCFTA are represented by the following hybrid matrix.

. (12)

The CMOS 0.18 µm implementation based on the second generation current controlled conveyor (CCCII) with a grounded y terminal and a balanced output operational transconductance amplifier (BOTA) [38] is shown in Figure 5. The dimensions of the transistors are shown in Table 2. The DC power supply voltages are equal to ±0.8 V. All transistors operate in the saturation region. For CMOS CCCFTA, the R_{f} and g_{mmi} are written as:

, (13)

where g_{mmi} (i = 2, 4) are the transconductances of transistors M_{2} and M_{4}, forming the f stage. In (13), the current I_{O} is used to adjust the R_{f}; µ_{0} is the free electron mobility

Figure 5. CMOS internal structure of CCCFTA.

Table 2. Scaling of MOS transistor dimensions.

in the channel; C_{OX} is the gate oxide capacitance per unit area; and W and L are the channel width and length, respectively. Similarly, the transconductances g_{m} of CCCFTA can be given by:

. (14)

where the current I_{B} is used to control the transconductance g_{m}.

4. CCCFTA Based Fractional Order Quadrature Oscillators

The proposed fractional order quadrature oscillator is shown in Figure 6. Because the parasitic resistance of the f terminal of CCCFTA is used as an active resistor in this circuit, this fractional order quadrature oscillator only consists of two CCCFTAs and three fractional capacitors.

Using Equation (12), a routine analysis of the circuit yields the following characteristic equation:

, (15)

From Equation (15), the CO and FO can be expressed as:

, (16)

, (17)

Moreover, because of the multiple-output CCCFTAs, the circuit can provide two inverted output currents, i_{out}_{2} and i_{out}_{4}. Thus, the relationship of all of the output currents can be expressed as:

(18)

The circuit provides four phase quadrature outputs of equal magnitudes.

Figure 6. Proposed fractional order quadrature oscillator employing CCCFTAs.

5. Simulation Results

The CCCFTA is realized in Figure 5, and the performance of the proposed circuits is verified using PSPICE with a standard chartered 0.18 µm TSMC CMOS process. The bias currents of CCCFTA_{1} and CCCFTA_{2} are I_{O}_{1} = I_{O}_{2} = 300 µA and I_{B}_{1} = I_{B}_{2} = 1 mA, respectively. Some cases are chosen to be simulated to show the reliability of the proposed design.

For case 1 (α_{1} = α_{2} = α_{3} = 1), the simulation parameters chosen are C_{F}_{1} = C_{F}_{2} = C_{F}_{3} = 40 pF. Figure 7 is the simulated quadrature outputs i_{out}_{1}, i_{out}_{2}, i_{out}_{3} and i_{out}_{4} at steady state. From the simulation results, the oscillation frequency of 3.50 MHz is obtained, which agrees well with the theory, as expected.

For case 2 (α_{1} = α_{2} = 1, and α_{3} = 0.5), the simulation parameters chosen are C_{F}_{1} = C_{F}_{2} = C_{F}_{3} = 40 pF, and the frequency of the oscillation equals 35.50 MHz. Figure 8 is the simulated quadrature outputs i_{out}_{1}, i_{out}_{2}, i_{out}_{3} and i_{out}_{4} at steady state.

For case 3 (α_{1} = α_{2} = α_{3} = 0.5), the simulation parameters chosen are C_{F}_{1} = C_{F}_{2} = C_{F}_{3} =

Figure 7. i_{out}_{1}, i_{out}_{2}, i_{out}_{3}, and i_{out}_{4} at steady state.

Figure 8. i_{out}_{1}, i_{out}_{2}, i_{out}_{3}, and i_{out}_{4} at steady state.

Figure 9. i_{out}_{1}, i_{out}_{2}, i_{out}_{3}, and i_{out}_{4} at steady state.

Table 3. The performance comparison table.

40 pF, and the frequency of the oscillation equals 1.02 GHz. Figure 9 is the simulated quadrature outputs i_{out}_{1}, i_{out}_{2}, i_{out}_{3} and i_{out}_{4} at steady state.

In each case, the experimental result is compared with the simulated results obtained through PSPICE. In the latter case, the fractional orders capacitors are approximated using the RC ladder networks as shown in Figure 2. The parameters of the fractional order quadrature oscillator for the simulation are divided into three cases in Table 3. Table 3 shows that the phase also increases with an increase in the order. It also shows the relationship between the frequency and the phase, which is an advantage that the fractional order can provide, such as a design for a specific phase.

6. Conclusion

This study presented the design of a fractional order CCCFTA-based four-phase sinusoidal oscillator. The proposed circuit consists of two CCCFTAs and three fractional order capacitors. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. The fractional order parameter gives extra degree of freedom to the design, and it increases the flexibility of the design and adds more fundamentals. PSPICE simulations are included to verify the theoretical analysis. Simulated and theoretical results are in close agreement.

Cite this paper

Comedang, T. and Intani, P. (2016) Current-Controlled CFTA Based Fractional Order Quadrature Oscillators. Circuits and Systems, 7, 4201-4212. http://dx.doi.org/10.4236/cs.2016.713345

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