Circuits and Systems, 2011, 2, 286-292
doi:10.4236/cs.2011.24040 Published Online October 2011 (http://www.scirp.org/journal/cs)
A State Variable Method for the Realization of Universal
Current-Mode Biquads
Raj Senani1, Kasim Karam Abdalla2, Data Ram Bhaskar2
1Division of Electronics and Communication Engineering, Netaji Subhas Institute of Technology, Delhi, India
2Department of Electronics and Communication Engineering,
Faculty of Engineering and Technology, Jamia Millia Islamia, New Delhi, India
Received May 26, 2011; revised July 14, 2011; accepted July 21, 2011
Abstract
A state variable method of converting single-resistance-controlled-oscillators (SRCO), into universal cur-
rent-mode biquad (offering realizations of all the five standard filter functions namely, low pass, band pass,
high pass, notch and all pass) has been highlighted. The workability of the exemplary implementation of the
derived current-mode universal biquad has been demonstrated by PSPICE simulation results based upon 0.35
μm technology. It is expected that the proposed method can be applied to other SRCOs to generate other
multifunction filter structures.
Keywords: Analog Electronics, Circuit Theory and Design, Current Mode Circuits, Universal Biquads,
Current Conveyors
1. Introduction
Current-mode universal filters employing current con-
veyors (CC) and their many variants have been exten-
sively investigated during the past two decades for in-
stance, see [1-19] and those cited therein. Current-mode
universal filters can be broadly classified in two catego-
ries namely the single input multi-output (SIMO)-type
([11-18]) and the multiple-input-single-output (MISO)-
type ([5,10,14,19]). It may be mentioned that while most
of the proposers of current-mode (CM) universal filters
have come up with a specific topology rather than dis-
closing any general method of systematic derivation of
such filters. It may also be noted that while a general
method for realizing SIMO-type CM universal filters has
been known earlier [20], to the best knowledge of the
authors, any systematic method of synthesizing MISO-
type CM universal biquads has not been reported explic-
itly in the open literature yet. The purpose of this paper is
to fill this void.
The main object of this paper is to present a state vari-
able method by which a given single resistance con-
trolled oscillator (SRCO) can be re-configured as a mul-
tiple-input-single-output (MISO)-type current-mode (CM)
universal biquad. Although the method to convert a
SRCO into universal current-mode biquad proposed here
might appear simple but it has not been explicitly pub-
lished in the open literature earlier.
2. The Proposed Method
Although the proposed method is quite general and can
be applied to any given SRCO using any kind of active
element, we illustrate the method by choosing an earlier
proposed SRCO as an example using fully differential
second generation current conveyor (FDCCII) as an ac-
tive element.
It may be recalled that a FDCCII and its applications
for analog VLSI were introduced by El-Adawy, Soliman
and Elwan in [1]. FDCCII has since then been used in
realizing various signal processing and signal generation
circuits for instance, see [1-6]. Simultaneously, improved
implementations of FDCCII have also been advanced;
see [7] and [8].
Some time back, Chang, Al-Hashimi, Chen, Tu and
Wan [2] presented two novel single-resistance-controlled-
oscillators (SRCO) using a single FDCCII and all ground-
ed passive elements, which is advantageous for inte-
grated circuit implementation.
Consider now one of the CM SRCOs from [2] (Figure
1 therein). The condition of oscillation (CO) for this cir-
cuit is given by 1
RR
3

and frequency of oscillation

R. SENANI ET AL.287
(FO) is given by 02312
With all its y-input terminals unconnected, the circuit
can be redrawn as shown in Figure 1(a).
1  RRCC .
Note that with 1
Y connected to
Z
 and 3 con-
nected to
Y
Z
 with 2 Y and 4 Y connected to ground,
one obtains the SRCO of Figure 1 of [2].
To synthesize a filter providing independent control of
0

(say, by the resistor 2) and independent control of
bandwidth (
R
0
/Q0

) (say, by the resistor ), one must
1
R
have a transfer function ()
()
out
in
INs
I
Ds
with its character-
istic polynomial given by ()Ds
222 0
0
0121
1
() s
Ds sss
QRCC


 

 223
CRR
(1)
From the above, the characteristic equation of the
circuit (assuming zero input) is given by
2
12 1223
10 s
sRCCCR R   (2)
It can be easily worked out that assuming that the cir-
cuit to be synthesized has to have two capacitors and
three resistors only, if the voltages across the assumed
capacitors C1 and C2 are taken as x1 and x2 respectively
FDCCII 1
C
1
R3
2
R2
C
Y
1
X+ 3
Z+
Z-
4 2
YYY
X-
R
Y
V1Y V3Y V4
Y
V2
x-
i
x+
iz-
i
z+
i
x1
x2
+
-
+
-
x+
V
x-
V
(a)
FDCCII 1
C
1
R
3
2
R2
C
Y
1
X+ 3
-Z+
Z- i1
i3
4
2
YYY
X-
R
i
i2
4
-Z-io
(b)
Figure 1. (a) Circuit arrangement with un-committed
y-inputs of FDCCII, derived from SRCO of [2]; (b) An ex-
emplary MISO-type universal CM biquad.
such a circuit should be characterized by the following
matrix state equation
1
12 1
22 2
23 21
1
d0
d[]
11d
d



  

   

  





x
CR 1
x
x
tA
x
x
x
CR CR
t
(3)
so that the consequent characteristic equation






0

dets IA (4)
would, indeed, result in the characteristic Equation (2).
Equation (3) can now be re-arranged as follows:
12
1
2
d
d
x
x
CtR (5)
21
2
31
d
d
2


x
xx
CtRR
(6)
The above equations can be considered to be the node
equations (NE) of the circuit to be synthesized. In view
of the FDCCII characterization, which is given by the
equations: 0,
Yk
i

k = 1 - 4; ,
124XYYY
123
()
XYYY
vvvv

()vv v
,v

  ,
ZX
ii



Z
X, the cir-
cuit shown in Figure 1(a) ( where terminal Z+ is re-
placed by –Z+) is characterized by the following equa-
tion
ii


1
1
2 2
21
1
12 12122
3
23 23234
d00
d1
0
d
d
11 1
0
11 10


 

  


 








 







Y
Y
Y
Y
x
x
t
x
xCR
t
v
CRCRCR v
v
CR CRCRv
(7)
where voltages across capacitors 1 and 2 C are cho-
sen as state variables 1
C
x
and 2
x
respectively. If the
various Y-terminal voltages of FDCCII are chosen as:
10 Y
v

, 20
Y
v

, , (8)
31Y
vx4Y vx2
then it can be verified that resulting state equations will
be same as in Equations (5) and (6).
After having made the above state variable assign-
ment and by appropriately connecting the required ex-
ternal terminals of the FDCCII in accordance with the
requirements in Equation (8), a non-autonomous circuit
with multiple-inputs and single-output (MISO) is subse-
quently created by augmenting the circuit with four ex-
ternal current input signals 123 and 4 and extend-
ing the FDCCII to have one additional Z+ output termi-
nal (henceforth to be referred as multiple output FDCCII
(MO-FDCCII)). The output current of the resulting cir-
,,iii i

R. SENANI ET AL. 288
cuit (shown in Figure 1(b)) is found to be:
1112 13
21 22241
01 2
02 3
4
00
00
00 00
0000
X
XX
XY
ZY
ZY
Y
I
VI
VV
IV
IV
V













  
  

 

 

  
 




2
3241
21221223
0
2
211223
1
1
ss
isi ii
CRCR CCRR
is
sCR CCRR

 




(9) 
(12)
Note that the D(s) of (9) is exactly same as (1).
The five filter responses can be realized from the cir-
cuit of Figure 1(b) as follows: Low pass (LP): making
234 and taking 1in
i. Band pass (BP):
making 13 and taking one of 2 or 4as in.
High pass (HP): making and taking or
1 along with 2. Notch: making 2 or
41 along with 21
. All pass (AP):
making along with .
0iii
ii
43in
iii
3in
iiii
ii
i
10i
1
R
R
0
i
iii
2
i
iR
i
R
Taking Equation (12) into consideration, the non-ideal
expression for the output current is given by (13)
Considering above, the non-ideal expressions for o

,
and
o
Q0
H
are found to be:
01 021324
1223
oCCRR



 ; 201021324
1
12 3
o
C
QR CRR



 (14)
1234in 21
The various parameters of the realized filters are given
by
i RR
The non-ideal gains and realization conditions (wher-
ever applicable) are modified as follows:
0LP
H
= –1 (remains unaffected by non-ideal volt-
age/current gains)
0
1223
1
CCRR
 ;
21
1
BW CR ; 2
1
12 3
o
C
QR
CRR

0BP
H= 1
01 0224
2
R
R
 .
(10)
1
2 0
for BP
1, for LP/HP/ AP/ Notch





R
R H (11) 0HP = H02


; where the condition of realization
modifies to 0124 12
RR


.
H0Notch = –1, if 02

= 1; realization condition being
same as in HP.
where ω0 = cut-off frequency in radian/sec, BW = band-
width, o= quality factor and 0 Q
H
= gain. In the last
three cases, having fixed the bandwidth (BW) by 1,
0
R

can be independently controlled by 3 while in the
first two cases 0
R

(with 2 and/or ) and BW (by
) are independently adjustable.
R3 R
1
R
0AP
H= –1, if 010224 1




 and 21 RR

.
From the above, the active and passive sensitivities of
the non-ideal 0

and are given by
o
Q
1 223
1
2
oooo
CC RR
SSSS


,
01 02 1324
1
2
oooo
SSSS

 

, ,
10
o
R
S


3. Analysis Incorporating Nonideal
Parameters
201021324
1
2
oooo o
QQ Q Q Q
C
SSS SS
 

,
Considering the non-ideal MO-FDCCIIs sources, two
parameters,

and

(where (1 )
i

  and
(1 )
v

  , with (
ii
1123
1
2
ooo
QQQ
CRR
SSS

, (15)
11
o
Q
R
S
)

  and (1)
vv

  denote the
current and voltage tracking errors respectively) need to From Equation (15) the active and passive sensitivities
of o

and are found to be in the range
o
Q11
2
F
x
S 
,
and the circuit, thus, enjoys low sensitivities.
be considered. Incorporating these sources of error, we
have the following non-ideal characterization of the
MO-FDCCII:

201 02 13 24
02 3022401 241
2122 1223
0
201 02 13 24
21 1223
ss
isi ii
CRCR CCRR
is
sCR CCRR






 




(13)
1Although additional circuitry e.g. a multiple-output current follower will be needed at the front end of the proposed universal CM filter circuits to
realize the conditions of the kind 43in iii

, the total amount of the hardware required, even after including such additional circuitry, will be lesser
than the three-FDCCII-based universal filter structures of [1].

R. SENANI ET AL. 289
4. Simulation Results
To verify the validity of the proposed configuration, cur-
rent mode filters have been simulated in SPICE by mak-
ing a CMOS MO-FDCCII based upon the FDCCII from
[3] (Figure 3 therein) which is shown here in Figure 2.
PSPICE simulation implementation was based upon a
CMOS MO-FDCCII in 0.35 μm technology where the
aspect ratios of the MOSFETs are shown in Table 1.
The CMOS MO-FDCCII was biased with DC power
supply voltages
D
D
V = +1.5 V, SS V = −1.5V,
B
I
=
35 μA, SB
I
= 100 μA, bp = 0.2 V, and bn = −0.66
V. To achieve the filters with o
V V
f
= 1 MHz, the compo-
nent values chosen were = = 0.71 k, 3 =
1.39 k, and 12 CC . The frequency re-
sponses of LPF, BPF, HPF, Notch and APF are shown in
Figure 3. Thus, a very good correspondence between
1
R
0. 2 F
R
16
R
n
theoretical values and PSPICE simulations is observed.
To test the input dynamic range of the proposed filters,
the simulation of the band-pass filter as an example has
been done for a sinusoidal input signal of fo = 1 MHz.
Figure 4 shows that the input dynamic range of the filter
extends up to amplitude of 300 μA without significant
distortion. The dependence of the output harmonic dis-
tortion on the input signal amplitude is illustrated in
Figure 5.
Although FDCCII-based filters have been proposed by
many authors as [1,3-6], with the exception of [1] (Fig-
ure 11 therein), [6] (Figure 2 therein), all others deal with
voltage-mode filters.
In view of this, a comparison with MISO-type CM
universal biquads using FDCCIIs presented recently in [1]
(Figure 11 there in) and [6] (Figure 2 therein) is now in
order. When compared with the circuit of [1], the circuit
of Figure 2 has the advantage of using only one active
building block (one FDCCII) as against three FDCCII’s
in biquads proposed in [1] and use of all grounded pas-
sive elements (AGPE) which is an attractive feature for
IC implementation. On the other hand, when compared
with the circuit of [6] (Figure 2 there in) our circuit has
1
2
4
3
M MMM
M
M
M
M
M
M
MM
M
M
M
M
M
M
M
M
M
MM
M
M
12
345 6
8
9
1
01
1
1
1
1
1
1
1
1
2
2
2
2
2
2
3
4
5
6
7
8
9
1
7
8
7
Z-
4
0
M
M
M2
2
2
2
5
M2
4
M24
M
4
M
4
M4
M
1
3
3
1
0
M3M3
M3
M3
M3
M3
M3
M3
M3
4
3
7
6
9
5
8
4
M0
2
9
-Z+ X+ X-
YY
YY
2
1
34
Vbp
Vbp
V
bn
V
bn
V
DD
V
SS
SB
I
B
I
Figure 2. CMOS realization of the FDCCII.
Table 1. Aspect ratios of MOSFETs.
MOS transistors W/L
M1 - M6 0.7/0.35
M7, M8, M9, M13 15/1.2
M10, M11, M12, M24 0.7/0.35
M14, M15, M18, M19, M25, M29, M30, M33, M34, M37, M38, M39, M40 20/0.35
M16, M17, M20, M21, M26, M31, M32, M35, M36, M41, M42, M43, M44 25/0.35
M22, M23, M27, M28 0.35/0.35
C
opyright © 2011 SciRes. CS

R. SENANI ET AL. 290
10
5
10
6
10
7
-60
-50
-40
-30
-20
-10
0
10
LP Theoretical
HP Theoretical
BP Theoretical
BR Theoretical
LP Sim ulation
HP Simulation
BP Simu lation
BR Sim ulation
10
5
10
6
10
7
-50
0
50
Phase Simulation
Phase Theoretical
AP Simulation
AP Theo retical
(a) (b)
Figure 3. PSPICE simulation results. (a) Gain response of LPF, BPF, HPF and Notch. (b) Gain and phase response of APF.
3.7 3.75 3.8 3.85 3.9 3.954
x 10-5
-4
-2
0
2
4x 10-4
Time (s)
Ampitude (A)
Iin Iout
Figure 4. Input and output waveforms of the band-pass filter of the proposed circuit for 1 MHz sinusoidal input current of
300 μA.
0
1
2
3
4
5
6
7
8
9
10
10 30507090
110 130 150 170 190
210
230
250
270
290
310
330
350
370
390
Iout (uA)
T HD %
Figure 5. Dependence of output current total harmonic distortion on input current amplitude for the band-pass filter realized
from the proposed configuration.

R. SENANI ET AL. 291
the advantages of independent tunability of BW or Qo
which is not feasible in the quoted circuit of [6] which
also needs two outputs to implement APF. Our FDCCII
has nine terminals in contrast to the FDCCII in [6] which
has eleven terminals to implement the biquad filter.
The comparison with [9] and [10] is now in order, The
circuit of [9] (Figure 8 there in) is also current-mode
MISO type and uses five grounded passive elements but
used two FDCCIIs (the first has ten terminals and the
other has nine terminals to implement the biquad filter)
and not independent tunability of BW or Qo.
The circuit of [10] although uses one FDCCII (eleven
terminals to implement the biquad filter in current –mode
and voltage mode) but has one floating resistance and
needs two outputs to implement LPF and APF.
5. Concluding Remarks
A method has been presented by which the FDCCII-
based CM SRCOs of [2] can be reconfigured as
MISO-type universal biquads offering realizations of all
the five standard filter functions also, thereby enhancing
their capabilities. One exemplary biquad resulting from
the application of the proposed method was presented
and its workability was demonstrated by SPICE simula-
tion using an FDCCII implementation in 0.35 μm CMOS
technology.
The methodology presented here could also be applied
to all other SRCOs published earlier using other kinds of
active building blocks thereby giving rise to a large
number of new MISO-type CM universal biquads, some
of which may possess some interesting features. This,
however, is left for further investigations.
6. Acknowledgements
The authors wish to thank an anonymous reviewer for his
constructive feedback, which has been helpful in im-
proving the presentation. The material presented here has
its origin in an earlier unpublished report2 of Analog Sig-
nal Processing Research Lab of NSIT, where part of this
work was performed.
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