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Energy and Power Engineering, 2013, 5, 803-806
doi:10.4236/epe.2013.54B154 Published Online July 2013 (http://www.scirp.org/journal/epe)
The Research on Stability of DC/DC in Parallel System
Ye Xu, Pengfei Hou, Jinquan Wang, Lei Xu, Chaohong Shi
PLA University of Science & Technology, Nanjing, China
Received February, 2013
In this paper, a main structure of DC distributed power system is introduced; the stab ility of the output vo ltage in paral-
lel system is put forward. This paper analyses the output impedance of master-slave current sharing mode and average
current sharing, analyses the stability o f parallel system through simulation , there is Right-h alf plane (RHP) polar in the
Bode plot of input impedanc e. At last this p aper distingu ishes whether this system is stability and ve rifies the validity of
Keywords: DC; Parallel System; Output Impedance; Bode; RHP Polar
With the development of distributed power system, the
role of power electronic devices is more and more im-
portant. In the actual power system，power supply mod-
ule is inevitably involved in cascade, parallel, series,
combination of collaborative work form. The interaction
between each subsystem effects on the overall perform-
ance of the power system including stability analysis,
dynamic performance, steady state harmonic power in-
fluence the quality and electromagnetic interference and
other related fields. Meanwhile, each module may come
from different suppliers; the power supply module is
gradually standardized to meet industry needs at the
same time. The compatibility match also needs to stan-
dardize the definition in order to ensure the universality
and interchangeability. The integrated system perform-
ance degradation even be shocked.
For DC Distributed Power System, usually diesel units
after rectifier connected to the DC grid, the battery after a
bidirectional DC/DC connected to the grid. Supply pow-
er to the DC load side by DC/DC transformer, Supply
power to the AC load side by DC/AC transformer. As
shown in Figure 1 for DC Distributed System.
The method of stability analysis of the previous sys-
tem needs to know module structure and parameter while
the criterion is complex, the method based on single
module impedance measurement only needs Cur-
rent-sharing method of parallel system and working con-
dition. Measuring the output impedance of single module
independently is through the relationship between total
output impedance and output impedance of parallel sys-
tem with a single module to get the total output imped-
ance, according to whether the output impedance of par-
allel system has the right half plane pole to judge the
stability of the parallel system.
2. Total Output Impedance of Parallel
System Based on Master-slave Current
As shown in Figure 2 is equivalent circuit model based
on master-slave current sharing mode. When the current
communication line interface is hanged, voltage loop
plays a role and current-sharing loop is inv alid. When the
flow line of communication interface is connected with
constant voltage source, current disturbance is 0, Output
impedance contains all information flow regulator .
Among them oM
is the output impedance of the
main module, oi
is output impedance of i when mod-
ule communication line is hanged, *
is output im-
pedance of i when module communication line is con-
nected with constant voltage source. The total output
impedance of the system is:
Figure 1. DC distributed power system.
Copyright © 2013 SciRes. EPE
Y. XU ET AL.
Figure 2. Circuit model of parallel system based on mas-
ter-slave current sharing mode.
3. Total Output Impedance of Parallel
System Based on Average Current
The same, as shown in Figure 3 is equivalent circuit
model based on average current sharing mode .
Output impedance of module i is:
csi oicsi csi
is output impedance of i when module communica-
tion line is hanged, csi
is output impedance of i when
module communication line is connected with constant
voltage source . Hence, The total output impedance of
the system is:
scsj csj csj
Among them csj
is the output impedance of j when
modules are worked in parallel, csj
is output imped-
ance of j when module communication line is hanged.
is output impedance of j when module communica-
tion line is connected with constant voltage source .
4. Simulation of Parallel System
As shown in Figure 4 is Bode graph of total output im-
pedance of the parallel system based on master-slave
current sharing mode. The graph shows that the output
impedance of the amplitude and phase changes with fre-
quency, the upper one is the direct measurement result
and the lower one is computin g result. As can be seen by
comparing, the measurement results and the computing
results are in agreement. Therefore the acquisition me-
thod of output impedance of parallel system based on
master-slave current sharing mode is validated.
As shown in Figure 5 is Bode graph of total output
impedance of the parallel system based on average cur-
rent sharing mode. The lower one is the direct measure-
ment result and the upper one is computing result. As can
be seen by comparing, the measurement results and the
Figure 3. Circuit model of parallel system based on average
current sharing mode.
Figure 4. Total output impedance of the parallel system
based on master-slave current sharing mode: Direct meas-
urement result (up), computing re sult (down).
Figure 5. Total output impedance of the parallel system
based on average current sharing mode: Direct measure-
ment result (down), computing r e sult (up).
Copyright © 2013 SciRes. EPE
Y. XU ET AL. 805
computing results are in agreement. Therefore the acqui-
sition method of output impedance of parallel system
based on average current sharing mode is validated.
5. Simulation Analysis of Parallel System
For the total output impedance of parallel systems, the
parallel system is stable if there are not RHP poles in the
total output impedance; the parallel system is not stable
while there are RHP poles.
As shown in Figure 6 is Bode graph of total output
impedance obtained from simulation in stable parallel
system, there are no RHP poles in the graph.
As shown in Figure 7 is simulation results in time
domain of parallel system, it shows two parallel con-
verter output current signal and the output voltage signal,
from the graph we can see the output voltage is stable.
As shown in Figure 8 is Bode graph of total output
impedance obtained from simulation in unstable parallel
system, there are RHP poles in the graph. From the graph
we can see there are RHP poles around 7.2 kHz.
As shown in Figure 9 is simulation results in time
domain of parallel system, from the graph we can see
there is turbulence in the output voltage of parallel sys-
tem and there is ripple in output curren t, it prov es that the
system is unstable.
Figure 6. Bode graph of total output impedance in stable
Figure 7. Simulation results of parallel system in time do-
6. Experiment on Validating Stability of
Through the above analysis, DC power is put as the
power supply for the parallel system, two DC/DC power
electronic loads work in parallel, measuring the output
impedance of parallel system by network analyzer. Both
a stable system (Experiment 1) and an unstable system
(Experiment 2) are measured.
As shown in Figure 10 is Bode graph of total output
Figure 8. Bode graph of total output impedanc e in unstable
Figure 9. Simulation results of parallel system.
Figure 10. The experimental result of experiment 1.
Copyright © 2013 SciRes. EPE
Y. XU ET AL.
Copyright © 2013 SciRes. EPE
impedance obtained from experiment 1.There are no
RHP poles, so the system is stable.
For the output voltage of parallel system correspond-
ing with the experiment 1, simulation results in the time
domain are shown in Figure 11:
Experiment verifies the simulation results, for the si-
mulation of stable system, the experimental system is
stable at the same time, and there are no RHP poles in
As shown in figure 12 is Bode graph of total output
impedance obtained from experiment 1.There are RHP
poles around 5 kHz, so the system is unstable. Figure 13. Simulation results of experiment 2.
Simulation results of experiment 2 in the time domain
are shown in Figure 1 3. 7. Conclusions
This paper analyzes the DC distributed system structure
firstly. In parallel with a plurality of power electronic
module in DC distributed system will cause instability,
then it analyses the output impedance of master-slave
current sharing mode and average current sharing, and
verify the method of obtaining output impedance in par-
allel system, after that it simulates the stability of the
parallel system. At last experiment verifies the correct-
ness of the simulation.
For unstable system in experiment 2, there are a large
number of ripples in output voltage, the system is unsta-
ble. There are RHP poles in Bode graph of output im-
pedance, the experiment is verified through simulation.
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Figure 11. Simulation results in the time domain of experi-
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Figure 12. The experimental result of experiment 2.