Deadlock Detection and Avoidance in Static Step Topology under Distributed Environment 51
in which resources are allocated to the processes as per
the incoming request of the resources then at a time only
one process can execute inside the critical section and
after finishing the execution of process resources are
released and next process will enter inside the critical
section then in this situation no deadlock will occur.
Processes synchronization will occur inside the critical
section.
Case 2: Symmetric Situation of Deadlock
The symmetric situation of deadlock arises when two
nodes N1 and N2 are participating for execution of the
processes and connected under step topology as shown in
Figure 3 and they communicate through message pass-
ing technique, then following two cases arise:
1) When multiple processes are going to execute on
node N1 as per the scheduling algorithm then if resources
are allocated to the younger processes then older proc-
esses which are waiting from a long time for resources
will die and deadlock will occur.
2) If the process on the either node N1 or N2 will wait
for a long time for resources then the processes will die
(time out) due to wait and die condition after some time
and deadlock will occur.
Avoidance: In the first case, the deadlock situation can
be handled by making a priority queue of the processes.
If the older processes are rolled back by giving priority
over younger processes then deadlock can be avoided.
In the second case, if the resources are available, re-
sources which are allocated and resources which will be
released by other processes are known to the other proc-
esses which are trying to execute on either N1 or N2 and
they communicate about the resources as said above
through message passing technique, then deadlock will
not occur.
6. Conclusion and Future Scope of Work
From the above it is concluded that the Unified Modeling
Language (UML) is used to construct a model for the
deadlock situation occurring in the static step topology.
Two cases in the form of reflexive and symmetric dead-
lock are discussed and corresponding avoidance methods
are explained. The present work can be extended for
validation of the proposed UML model through Markov
chain or Finite State methods.
7. Acknowledgements
Our thanks are due to University Grants Commission
(UGC), New Delhi, India for providing financial assis-
tance to carry out this work.
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