S. ZOUARI ET AL. 73

the modulator output spectrum for

GSM/UMTS/Wifi/WiMAX modes for a 0.1/1.92/10 MHz

input signal at a sampling frequency of 12.8/64/176 MHz

under the condition of 0.2% random capacitor mismatch,

0.5% DAC INL mismatch. Jitter and thermal noises are

the other limitations assumed in this simulation with

clock jitter of 10 ps and Cs equal to 0.25 pF. Taking into

account the use of the real selected folded cascode OTA

in the four integrators of the reconfigurable ΣΔM, these

simulation results show that a high linearity can be

achieved thanks to the low-distortion of the Sigma-Delta

modulator. Behavioral simulation results indicate that the

proposed multistandard topology achieves a peak SNR of

105/98/65 dB for GSM/WCDMA/WLAN standards re-

spectively in the presence of these circuit non-idealities.

5. Conclusion

The major contribution of this work is the development

of an accurate behavioral model of multistandard ΣΔM

for GSM/UMTS/Wifi/WiMAX zero-IF receiver using

VHDL-AMS as the modeling language. It takes into ac-

count at the behavioural level most of SC ΣΔ modulator

non-idealities, such as DAC non-linearity, OTA parame-

ters (finite DC gain, finite bandwidth, slew rate), thermal

noise and capacitor mismatch, thus it permits to obtain a

good estimation of the ΣΔ modulator performance with a

short simulation time. Future works would involve the

implementation of the 2-1-1 cascade ΣΔ converter using

device-level simulations.

REFERENCES

[1] P.-I. Mak, U. Seng-Pan and R. P. Martins, “Transceiver

Architecture Selection: Review, State-of-the-Art Survey

and Case Study,” IEEE Circuits and Systems Magazine,

Vol. 7, No. 2, 2007, pp. 6-25.

doi:10.1109/MCAS.2007.4299439

[2] P. B. Kenington and L. Astier, “Power Consumption of

A/D Converters for Software Radio Applications,” IEEE

Transactions on Vehicular Technology, Vol. 49, No. 2,

2000, pp. 643-650. doi:10.1109/25.832996

[3] Z. Ru, N. A. Moseley, E. Klumperink and B. Nauta,

“Digitally Enhanced Software-Defined Radio Receiver

Robust to Out-of-Band Interference,” IEEE Journal of

Solid-State Circuits, Vol. 44, No. 12, 2009, pp. 3359-

3375. doi:10.1109/JSSC.2009.2032272

[4] B. Razavi, “Cognitive Radio Design Challenges and

Techniques,” IEEE Journal of Solid-State Circuits, Vol.

45, No. 8, 2010, pp. 1542-1553.

doi:10.1109/JSSC.2010.2049790

[5] R. Bagheri, A. Mirzaei, M. E. Heidari, S. Chehrazi, M.

Lee, M. Mikhemar, W. K. Tang and A. A. Abidi, “Soft-

ware-Defined Radio Receiver: Dream to Reality,” IEEE

Communications Magazine, Vol. 44, No. 8, 2006, pp.

111-118. doi:10.1109/MCOM.2006.1678118

[6] A. Silva, J. Guilherme and N. Horta, “Reconfigurable

Multi-Mode Sigma-Delta Modulator for 4G Mobile Ter-

minals,” Integration, the VLSI Journal, Vol. 42, No. 1,

2009, pp. 34-46.

[7] M. Miller and C. Petrie, “A Multibit Sigma Delta ADC

for Multimode Receivers,” IEEE Journal of Solid State

Circuits, Vol. 38, No. 3, 2003, pp. 475-482.

doi:10.1109/JSSC.2002.808321

[8] F. Medeiro, B. Pérez-Verdú and A. Rodríguez-Vázquez,

“Top-Down Design of High-Performance Sigma-Delta

Modulators,” Kluwer Academic Publishers, Boston, 1999,

p. 312.

[9] A. A. Abidi, “The Path to the Software-Defined Radio

Receiver,” IEEE Journal of Solid-State Circuits, Vol. 42,

No. 5, 2007, pp. 954-966. doi:10.1109/JSSC.2007.894307

[10] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A.

Baschirotto, “Analogbaseband Channel for Reconfigur-

able Multistandard (GSM/UMTS/WLAN/Bluetooth) Re-

ceivers,” Proceedings of the WIRTEP, Rome, April 2006,

pp. 88-92.

[11] M. Brandolini, P. Rossi, D. Manstretta and F. Svelto,

“Toward Multistandard Mobile Terminals—Fully Inte-

grated Receivers Requirements and Architectures,” IEEE

Transactions on Microwave Theory and Techniques, Vol.

53, No. 3, 2005, pp. 1026-1038.

doi:10.1109/TMTT.2005.843505

[12] R. del Río, F. Medeiro, J. M. de la Rosa, B. Pérez-Verdú

and A. Rodríguez-Vázquez, “A 2.5 V CMOS Wideband

Sigma-Delta Modulator,” IEEE Instrumentation and

Measurement Technology Conference, Vail Colorado,

May 2003, pp. 224-228.

[13] A. Silva, J. Guilherme and N. HortaCir, “A Reconfigur-

able Sigma-Delta Modulator Reconfiguration of Cascade

Sigma Delta Modulators for Multistandard GSM/Blue-

tooth/UMTS/WLAN Transceivers,” IEEE International

Symposium on Integration Circuits and Systems, ISCAS,

Island of Kos, 21-24 May 2006, pp. 1884-1887.

[14] J. Marttila, M. Allén and M. Valkama, “Design and

Analysis of Multi-Stage Quadrature Sigma-Delta A/D

Converter for Cognitive Radio Receivers,” Proceedings

of the 16th IEEE International Workshop on Computer-

Aided Modeling Analysis and Design of Communication

Links and Networks, Kyoto, 10-11 June 2011, pp. 10-11.

[15] A. Morgado, R. del Río and J. M. de la Rosa, “Design of

a 130-nm CMOS Reconfigurable Cascade ΣΔ Modulator

for GSM/UMTS/Bluetooth,” IEEE International Sympo-

sium on Circuits and Systems, ISCAS, Island of Kos,

27-30 May 2007, pp. 725-728.

[16] S. zouari, et al., “High Order Cascade Multibit Sigma

Delta Modulator for Wide Bandwidth Applications,” In-

ternational Journal of Electronic Commerce Studies, Vol.

1, No. 1, 2007, pp. 60-66.

[17] H. Daoud, S. Bennour, S. Ben Salem and M. Loulou,

“Low Power SC CMFB Folded Cascode OTA Optimiz-

tion,” The IEEE International Conference on Electronics,

Circuits, and Systems, St. Julien, 31 August-3 September

2008, pp. 570-573.

[18] R. Schreier, J. Silva, J. Steensgaard and G. C. Temes

“Design-Oriented Estimation of Thermal Noise in Swit-

ched-Capacitor Circuits,” IEEE Transactions on Circuits

Copyright © 2013 SciRes. CS