** Engineering ** Vol. 2 No. 12 (2010) , Article ID: 3612 , 4 pages DOI:10.4236/eng.2010.212127

Evaluation of Fatigue Life of Semiconductor Power Device by Power Cycle Test and Thermal Cycle Test Using Finite Element Analysis

^{1}Advanced Power Electronics Project, Kanagawa Academy of Science and Technology, Kawasaki City, Japan

^{2}Department of Mechanical Engineering, Yokohama National University, Yokohama, Japan

E-mail: shinohara@06.alumni.u-tokyo.ac.jp

Received October 12, 2010; revised November 22, 2010; accepted November 24, 2010

**Keywords:** Power Electronics, Power Modules, Reliability, Damage, Simulation Technology, Solder Joint Fatigue, Crack Propagation, Mechanical Stress

ABSTRACT

To accurately predict the fatigue life of a power device, a fatigue life evaluation method that is based on the power cycle is presented in terms of an algorithm based on a combination of electrical analysis, heat analysis, and stress analysis. In literature, the fatigue life of power devices has been evaluated on the basis of the thermal cycle. This cycle is alternately repeated within a range from a high temperature to a low temperature. In an actual operating environment, however, a power device works in a power cycle that consists of being switched ON and OFF. To accurately predict the fatigue life cycle of a device, then, the evaluation should take account of this important aspect of the power cycle. To verify the utility of the evaluation method presented in this study, the results for a power cycle based on the combined use of electrical analysis, heat analysis, and stress analysis are compared to the results based on the thermal cycle, as found in the literature. Our conclusion is that the fatigue life cycle as estimated by the thermal cycle test is higher than that estimated by the power cycle.

1. Introduction

Nowadays, increasing attention is being paid to environmental problems such as global warming. In this regard, hybrid cars attract interest as fuel-efficient transportation. The growth of the fuel-efficient transportation market is anticipated. In hybrid cars and electrical cars, electric power is used as the driving energy source. In order to drive a motor efficiently, direct current must be converted to alternating current by an inverter. The electrical device used in the inverter is called the power device [1,2]. Currently, the power devices in a car is used as an auxiliary for the internal-combustion engine. In order to use a power device as the driving energy source in a car such as a hybrid or an electrical car, there must be a strong flow of electrical current in the device. On the other hand, the available space in a car inverter is limited. The power device must be compact. This compactness cannot be avoided with the use of high power density, a higher degree of power device reliability is required than can be found in the literature on the subject.

In the methods of evaluating fatigue in power devices found in the literature, we see that a stress test cycle is applied [3]. Bond wire heel crack failures have been observed in experiments. In evaluating the fatigue of a power device, the thermal distribution is closely related to the fatigue life. The thermal distribution at the solder junction and in the power device is computed using a combination of electrical and heat analysis [4,5]. The fatigue life cycle has also been predicted using thermal stress analysis [6-11]. In an experiment, the fatigue life of a power device has been evaluated by a thermal cycle test [12], in which the temperature is raised to a specified point and then lowered to room temperature. This raising and lowering constitutes one cycle, and such cycles are repeated until failures appear in the power device.

The temperature distribution in a power device tends to become more uniform when here is a low degree of electrical loss under a low power current density. Therefore, by using a thermal cycle test, the fatigue life cycle can be evaluated. Increased compactness of power devices is a great need in our time. A power device is also used under a high current density caused by the high current. Because heat increases at the local solder junction of power devices, the temperature distribution tends to become non uniform. This may explain the difference between the evaluation of the fatigue life cycle based on a thermal cycle test as opposed to one based on the power cycle.

In this study, a method of evaluating fatigue based on the power cycle is presented, using a combination of electrical and heat stress analysis [13]. The discretization procedure is based on the finite element method [14]. The propagation of cracks is modeled in the solder junction, since this cracking is the main cause of power device failure. Crack propagation thus becomes an important factor in the evaluation of the fatigue life cycle. By comparing the results of the thermal cycle test with those of the power cycle test, we obtain new insight into the evaluation of fatigue life.

2. Power Device Structure

The structures of a power device are shown in Figure 1. [17]. These consist of multilayered structures (aluminum wires, a copper plate, an aluminum nitride plate, a silicon plate, and an aluminum plate (heat sink)). The silicon is soldered to the copper plate. Solder is an alloy metal that is composed of tin, silver, and copper. The aluminum nitride plate is attached to the aluminum plate through the copper plate. Semiconductor devices can be subject to significant mechanical stress resulting from a mismatch between the CTE of the different layers. The mismatch between the CTE of the silicon and the copper plate is much greater than that between the other layers. Solder is most suitable for use because it has low elasticity, low yield strength, and a relatively high ductility.

To prevent expansion, heat needs to be dissipated through the use of a sandwich-like structure. Solder degradation increases the silicon resistance. Cyclical temperature changes result from the creep strain and plastic strain that are produced by the power cycle, which in turn produces cracking in the solder due to fatigue. It is necessary for the structure to release heat from the silicon. The contact area of the aluminum nitride plate is larger than that of the laminated structure between the silicon and the heat sink plate. In Figure 1, boundaries (i) and (ii) are on the collector side and emitter side, respectively. The current flows from the collector side (i) to the emitter side (ii) through aluminum wires. The current on boundary (i) is the collector current. The difference in voltage between (i) and (ii) is the collector-emitter voltage.

3. Theory

3.1. Electrical Analysis

In Maxwell’s equations, a steady direct current is as fol-

Figure 1. Power device structure (Wire type).

lows:

(1)

The variables S, n, and J indicate the surface, outward normal, and current density, respectively. The current density, J, is as follows:

(2)

where E and σ represent the electric field strength and the electrical conductivity, respectively. The dissipation of the electrical energy, P, by the current in the conductivity is as follows:

(3)

In this study, it is assumed that the dissipated electrical energy is transformed into heat energy.

3.2 Heat Analysis

Heat is generated by the dissipation of electrical energy. For a thermal analysis, the equation is as follows:

(4)

where T, t, C, λ and Δ represent the temperature, time, specific heat, coefficient of thermal conductivity, and Laplacian, respectively. Using the linear expansion coefficient α, the increment of the thermal strain is as follows:

(5)

3.3. Stress Analysis

Strain consists mainly of elastic strain (ε_{e}), plastic strain (ε_{p}) and creep strain (ε_{c}), which is time dependent. In this study, the total strain consists of the elastic strain, plastic strain, creep strain, and thermal strain (ε_{θ}).

(6)

In the case that the external stress does not affect this strain, the strain is zero (Δε = 0).

(7)

Thermal strain that is caused by material expansion is converted to elastic strain, plastic strain, and creep stain. A body is deformed due to a force exerted upon its surface between materials. In a state of elasticity, a body can return to its initial condition. However, the initial condition of the body cannot fully recover its plastic behavior, and the strain remains in the body. In creep behavior, the body is deformed in relation to the amount of time that passes. Creep strain is calculated as follows:

(8)

where A and n are the parameters shown in Table 5. The variable σ_{m} represents the von Mises stress as follows:

(9)

where the variables σ_{1}～σ_{3} represent the principal stresses.

3.4. Coffin-Mansion Law

The fatigue life cycle N is related to the strain range, Δε. Coffin and Manson presented an approximate line correlating N and Δε using a double logarithmic graph. This relationship is the Coffin-Manson Law, which is expressed as follows:

(10)

where C and α are the constant of proportion and the fatigue coefficient, respectively. In this study, N is defined as follows [15]:

(11)

An isothermal mechanical fatigue test is performed using a BGA test piece, in order to investigate the fatigue characteristics of Sn-Ag-Cu lead-free solder and the relationships between the number of cycles and the beginning of fatigue cracking and the strain range. Equation (11) is derived from the Coffin-Mansion Law by using these plots in Figure 2.

The plastic strain range and creep strain range affect the fatigue life cycle. In this study, the strain range Δε is defined as follows:

, (12)

where Δε_{p} and Δε_{c} represent the ranges of plastic strain and creep strain, respectively.

3.5. Cumulative Damage Rule (Miner’s Rule)

In a real environment, steady repetitive loads are rare, as there are usually complex changes in the load duration and amplitude. It is therefore difficult to quantitatively estimate material damage. The cumulative damage rule is generally applied in order to estimate damage approximately. This rule is an evaluation method based on damage superposition. The damage ratio for the strain range experienced in one cycle is assumed to be 1/N. The fatigue damage is derived from Equation (10) as follows:

(13)

The damage D caused by loading n times is assumed to be

. (14)

Figure 2. S-N curve of solder [15].

These loads are applied under the same conditions. The cumulative damage caused by different loads is assumed to be as follows:

(15)

These loads are applied under different conditions. This relationship is also called Miner’s rule. The index i represents the phase of the crack’s progress, as shown in Figure 3. The phase indicates a point in time that is defined by arbitrarily dividing the time span. If the value of the damage reaches D = 1, a crack occurs in the material. In the case of i = 0 (the initial condition), the material displays no damage. The fatigue life cycle is defined as N_{1} = N (Equation (11)). After the phase index i = 0, additional damage is caused in the phase i = 1. Therefore, the equation is as follows:

(16)

The quantity in the parenthesis, 1-D, indicates the ratio of the damage not yet caused. The variable N_{i} is obtained by the Coffin-Manson Law (Equation (11)).

4. Algorithm

The analysis algorithm, which is shown in Figure 4, consists of five steps. In the first step, the boundary conditions and the material constants are set in the calculation model. In the second step, the combined electrical-thermal analysis is performed iteratively. The algorithm determines the temperature data at each time step for all nodes. The power cycle from the start time to the end time is obtained, as shown in Figure 8. In the third step, the combined thermal-stress analysis is performed in order to obtain the strain values (for plastic and creep strain). In the third step, the algorithm requires the temperature distribution data. In the fourth step, the number of cycles required to determine the fatigue life is calculated. The fourth step also consists of five stages, which can be described as follows.

4.1. First Stage

In this study, it is assumed that the initial crack occurs at the point of maximum strain. Subsequently, the solder domain replaces the crack domain by a threshold at every phase i. The threshold is determined by the Manson-Coffin Law and cumulative damage rule. In order to calculate the crack length, one line is used to determine how the crack progresses. In the computational domain, 3D domains are used for cracks. To determine a crack length (1D), the crack domain should be projected on an axis (one line). Therefore, an axis (one line) is set along the direction of the crack progress after checking the 3D crack domain, as shown in Figure 24 of the phase I = 9.

4.2. Second Stage

The fatigue life cycle is calculated using the Coffin-Manson Law. The strain range (Equation. (12)) in the Coffin-Manson law is calculated by the finite element method.

4.3. Third Stage

The damage at the node point (I) (the maximum strain) in Figure 3 is defined as D = 1. Therefore, the initial crack occurs at the maximum strain point. In each phase, i, the fatigue life cycle, N, at the maximum strain is defined as the variable in Equation (11). By using N, the fatigue life cycle at the other node point is obtained.

Figure 3. Crack progress.

4.4. Fourth Stage

At each node, the damage at each phase is added (Equation (15)). Tables 1-3 show the relationship between the fatigue life cycle and the damage. For example, the accumulated damage of coordinate (II) in Table 2 is calculated as follows:

(17)

where the subscript indexes represent the phase number and the coordinate number, respectively. Using Equation (16), the parameter n_{2, (II)} is calculated as follows:

(18)

The accumulated damage of the coordinate (III) in Table 3 is calculated as follows:

(19)

The parameter n_{3,(} _{III)} is calculated as follows:

Figure 4. Algorithm.

(20)

As shown in Figure 4, many iterations from step 1 to step 5 are needed with respect to crack propagation, which increases the total computing time. Therefore, the 1,000 elements ranked as having the highest damage among all the elements of the solder mesh are deleted in every phase.

4.5. Fifth Stage

The relationship between the fatigue life cycle and crack length is obtained. In this study, the projection of the crack length on the y axis is shown in Figure 24.

4.6. Sixth Stage

The analysis data (stress, thermal, and electrical distribution) are visualized. Figure 4 illustrates the algorithm that uses the power cycle. In the case that the fatigue life cycle is evaluated based upon the thermal cycle, the combined thermal and electrical analysis is not needed.

5. Calculation Conditions

For this paper, ABAQUS^{R} was used as a software tool. In the computing mesh, there are 34634 and 169749 elements. The solder thickness is set to 37.5 μm. This solder mesh is separated into 3 blocks layered in the z direction, as shown in Figure 5. In this model, it is assumed that cracks are created only in the intermediate solder layer, and are not created in either the top or bottom solder layers. In the experimental results, cracks tend to occur in the intermediate solder layer. In the electrical analysis, the collector side current on boundary (i) was 60.0 A (as shown in Figure 1). The voltage on the emitter side (ii) was set to 0.0 V. In the thermal analysis, the temperature on the bottom of the heat sink was set to 25°C (the natural cooling condition). The heat transfer coefficient is set to [17]. In the structural analysis, the displacement with respect to the x, y, and z axes was fixed at the bottom edges of the heat sink. The material properties used in the calculated model are summarized in Table 4. The plastic strain data of the solder with respect to the yield stress and the creep strain data of the solder are shown in Figure 6 and Table 5, respectively. The time step was set to 0.1 s. However, the program automatically subdivides a large time step into several smaller steps if the algorithm has problems.

In order to compare the evaluation of fatigue life based on the power cycle versus evaluation based on the ther-

Figure 5. Mesh.

Table 4. Material constant.

Figure 6. Plastic strain of solder [16].

Table 5. Solder parameter of creep strain in Equation(8) [16].

mal cycle, three different calculation conditions were set in the computing model. The power cycle test is defined as calculation condition 1. By switching the electrical power supply on and off, stress between parts is generated by thermal expansion. The thermal cycle test is defined as calculation condition 2. The power device is gradually heated on its bottom. The temperature rises to a specified point and is then lowered to room temperature. Using experimental equipment, the heat is conveyed from the plate of this to an object through the bottom of the object. This type of experimental equipment is modeled in calculation condition 2.

The thermal shock cycle test is defined as calculation condition 3. The temperature cycle of condition 3 is almost in agreement with the cycle of condition 2. The temperature gradient of calculation condition 3 with respect to time is larger than it of calculation condition 2. The power device is rapidly heated in calculation condition 3. Heat is conveyed from a fluid to the object through all the surfaces of the object by setting a power device in the fluid (air, etc.).

6. Results

6.1. Power Cycle and Thermal Cycle

Power devices are used to adjust currents and voltages. They are installed in hybrid cars, elevators, etc., and do not always work with uniform currents and voltages. An electric current begins to flow at start up, after which it may decrease if the speed of the equipment becomes constant. Such operations are constantly repeated by the starting and the stopping of cars, elevators, etc.

An On-Off control is shown in Figure 7. In the first case, the voltage is adjusted from 10 V to 5 V by placing a series resistance in the circuit. This 5 V drop in voltage causes an energy loss in the circuit. A power device, however, makes it possible to supply an average voltage of 5 V through the use of On-Off switching, which results in a low degree of energy loss. However, when the electrical power supply is switched on and off, the temperature of the power device increases and decreases, respectively. These iterative increases and decreases in temperature naturally cause mechanical stress to occur due to the CTE mismatch.

Temperature cycling is generally applied as a method

Figure 7. Resistance control and ON-OFF control.

of evaluating the fatigue life of power devices. In a combined thermal-mechanical analysis, the temperature is raised to a specified point and then lowered to room temperature. This form of analysis is not considered in an electrical analysis.

As shown in Figure 8, the electricity is turned on until a certain high temperature is reached. After that, the electricity is turned off until the temperature returns to room temperature. These processes together constitute one cycle. The on time and off time are set to 3.5 s and 18 s, respectively. The voltage contour and current density contour are shown in Figures 9 and 10, respectively. An electrical energy loss occurs when the voltage on the collector side of the silicon chip is reduced rapidly. This energy loss is converted to heat energy.

6.2. Time History of Temperature (No Cracks (Phase I = 0))

The time history of the maximum temperature with respect to power is shown in Figure 11. In calculation condition 1, the temperature rises during the ON time in the power cycle, as shown in Figure 8. The temperature

Figure 8. Power cycle and thermal cycle

Figure 9. Voltage contour (25 (s)) (phase 0).

Figure 10. Current density contour (25 (s)) (phase 0).

decreases during the OFF time. Heat is essentially not generated on the emitter side connection. Electrical energy losses occur when the voltage on the collector side is rapidly lowered. This energy loss is converted to heat energy by Equation (3). In the wire type power device, the heat concentration occurs in the small connecting space between the wire and the silicon plate, as shown in Figures 12-14. The fatigue life cycle of a power device depends on the maximum temperature it experiences. By adjusting the maximum temperature, the maximum temperature in calculation conditions 2 and 3 is in agreement with that of calculation condition 1.

As shown in Figures 15-17 and in calculation condition 2, heat is gradually transferred from the bottom to the top. As shown in Figures 18-20, heat is transferred from all sides on the surface of the power device. The temperature gradient of calculation condition 2 with respect to time is lower than it is in calculation condition 3.

The temperature distributions on the solder are shown in Figure 21. In this study, the fatigue life of a power device is estimated by analyzing the strain in relation to the solder crack. Fatigue life depends on the temperature

Figure 11. Time history of maximum temperature in power device with respect to power cycle and thermal cycle.

Figure 12. At time 0.1(s), temperature contour map of semiconductor power devices in calculation condition 1 (Power cycle test).

Figure 13. At time 0.5(s), temperature contour map of semiconductor power devices in calculation condition 1 (Power cycle test).

distribution in the solder plate. As shown in Figure 21, in calculation condition 1, the temperature distribution on the solder layer becomes non uniform. In the calculation conditions 2 and 3, the temperature distribution on the solder layer becomes non uniform.

Figure 14. At time 3.5(s), temperature contour map of semiconductor power devices in calculation condition 1 (Power cycle test).

Figure 15. At time 0.1(s), temperature contour map of semiconductor power devices in calculation condition 2 (Thermal cycle test).

Figure 16. At time 0.5(s), temperature contour map of semiconductor power devices in calculation condition 2 (Thermal cycle test).

Figure 17. At time 3.5(s), temperature contour map of semiconductor power devices in calculation condition 2 (Thermal cycle test).

Figure 18. At time 0.5(s), temperature contour map of semiconductor power devices in calculation condition 3 (Thermal shock cycle test).

Figure 19. At time 0.5(s), temperature contour map of semiconductor power devices in calculation condition 3 (Thermal shock cycle test).

6.3. Strains (No Cracks (Phase I = 0))

The time histories of the maximum plastic strain and maximum creep strain with respect to the power cycle and the thermal cycle (Figure 8) are shown in Figures 22 and 23, respectively. In calculation condition 1 (the

Figure 20. At time 3.5(s), temperature contour map of semiconductor power devices in calculation condition 3 (Thermal shock cycle test).

power cycle), the maximum strains occur at the center of the solder junction between the silicon plate and the copper plate. In calculation condition 2 (the thermal cycle) and calculation condition 3 (the thermal shock cycle), the maximum strains occur over the solder plate. Both plastic strain and creep strain are accumulated during power transitions. In this study, the fatigue life cycle is estimated based upon the ductility of the second ON time between 21.5 s and 25 s. The strain range is defined in Equation (12). It is assumed that there is no difference in the strain range after the second ON time. As shown in Figure 22, the maximum plastic strain of the three calculation conditions is almost in agreement. As shown in Figure 23, the maximum creep strain for calculation condition 1 is larger than it is for calculation conditions 2 and 3.

6.4. Crack Propagation

Crack propagation is illustrated in Figure 24. In calculation condition 1 (power cycle), an ellipsoidal crack first begins in the solder below the aluminum wire bonding. No cracks begin in the corners. The size of the crack increases according to the time in the power cycle. In calculation condition 2 (thermal cycle), the crack begins from both the corner and the center of the solder. In calculation condition 3 (thermal shock cycle), the crack begins only from the corner of the solder and then progresses along the edge of the solder.

6.5. Fatigue Life Cycle

The relationship between fatigue life cycle and crack length is shown graphically in Figure 25. Crack length is defined as shown in Figure 24. The fatigue life cycles determined by the thermal cycle test and by the power cycle test are 5747 and 4537 for the initial crack length (50 μm), respectively. Therefore, the power device may

Figure 21. Solder between copper plate and silicon plate.

Figure 22. Time history of plastic strain with respect to power cycle and thermal cycle at maximum point on solder.

cause failures earlier than was predicted by the simulation results, if the reliability of the power device is evaluated by the thermal cycle test.

7. Conclusions

To accurately evaluate the fatigue life of power devices

Figure 23. Time history of creep strain with respect to power cycle and thermal cycle at maximum point on solder.

using a power cycle test, a combination of electricity and heat-structure analysis is presented. By comparing the evaluation of fatigue life obtained by the power cycle test in this study with that obtained by the thermal cycle test in the literature, we arrived at the following conclusions:

In the temperature distribution on the solder junction layer, the heat diffuses radially from the junction of the

Figure 24. Crack propagation on solder between copper plate and silicon plate (creep contour).

Figure 25. Fatigue life cycle with respect to crack length.

wire bonding. Therefore, the temperature distribution of the solder junction tends to become non uniform.

In the power cycle test, an ellipsoidal crack began at the center of the solder below the aluminum wire bonding. No cracks began in the corners. The size of the crack increased with the time of the power cycle. In the thermal shock cycle test, a crack began only from the corner of the solder and then progressed along the edge of the solder.

In the initial crack length (50 μm), the fatigue life cycles obtained by the power cycle test and the thermal cycle test were 5747 and 4537, respectively. The fatigue life cycle determined by the power cycle test was shorter than that determined by the thermal shock cycle test. The actual power device operated by a power cycle may produce failures earlier than is predicted based on simulation results if the reliability of the power device is evaluated by the thermal cycle test. Therefore, the evaluation of fatigue life using the power cycle test is clearly superior, as it produces results that are quite close to those of the actual operating conditions.

8. REFERENCES

- B. J. Baliga, “Fundamentals of Power Semiconductor Devices,” Springer-Verlag, Berlin, 2008.
- H. Lu, W-S. Loh, T. Tilford, et al., “Reliability of Power Electronic Modules,” InterPACK Conference American Society of Mechanical Engineers, New York, 8-11 July 2007, pp. 883-888.
- S. Ramminger, N. Seliger and G. Wachutka, “Reliability Model for Al Wire Bonds Subjected to Heel Crack Failures,” Microelectronics Reliability, Vol. 40, No. 8-10, 2000, pp. 1521-1525.
- O. Usui, H. Muto and T. Kikunaga, “Evaluation of Temperature Distribution of a Power Semiconductor Chip Using Electrothermal Simulation,” IEEJ Transactions on Industry Applications, Vol. 124, No. 1, 2003, pp. 108- 115.
- M. Ishiko, M. Usui, T. Ohuchi and M. Shirai, “Design Concept for Wire-bonding Reliability Improvement by Optimizing Position in Power Devices,” Microelectronics Reliability, Vol. 37, No. 3, 2006, pp. 262-268.
- M. O'Keefe and A. Vlahinos, “Impacts of Cooling Technology on Solder Fatigue for Power Modules in Electric traction Drive Vehicles,” 2009 IEEE Vehicle Power and Propulsion Conference, Michigan, 7-10 September 2009, pp. 1182-1188.
- X. Xie, X. Bi and G. Li, “Thermal-mechanical Fatigue Reliability of PbSnAg Solder Layer of Die Attachment for Power Electronic Devices,” International Conference on Electronic Packaging Technology & High Density Packaging, Beijing, 10-13 August 2009, pp.1181-1185.
- L. J. Ladani, “Reliability Estimation for Large-Area Solder Joints Using Explicit Modeling of Damage,” Device and Materials Reliability, IEEE Transactions, Vol. 8, No. 2, 2008, pp. 375-386.
- W. D. Zhuang, P. C. Chang, F. Y. Chou and R. K. Shiue, “Effect of Solder Creep on the Reliability of Large Area Die Attachment,” Microelectronics Reliability, Vol. 41, No. 12, 2001, pp. 2011-2021.
- H. Ye, M. H. Lin and C. Basaran, “Failure Modes and FEM Analysis of Power Electronic Packaging,” Finite Elements in Analysis and Design, Vol. 38, No. 7, 2002, pp. 601-612.
- Y. Nagatomo, T. Nagase and S. Shimamura, “FEM Analysis of Thermal Cycle Properties of the Substrates for Power Modules,” Journal of Japan Institute of Electronics Packaging, Vol. 3, No. 2, 2000, pp. 330-334.
- T. Matsunaga and S. Sudo, “Evaluation of Fatigue Life Reliability and New Lead Bonding Technology for Power Modules,” Mitsubishi Electr. Adv., Vol. 113, No. 5, 2006, pp. 13-16.
- K. Shinohara and Q. Yu, “Fatigue Evaluation of Power Devices,”, International Conference on Electronic Packaging Technology & High Density Packaging, 10-13 August 2009, pp. 1277-1283.
- O. C. Zienkiewicz and R. L. Taylor, “The Finite Element Method,” Butterworth-Heinemann, Oxford, 2005.
- A. Tanaka, Q. Yu, T. Shibutani, Y. Kobayashi and M. Shiratori, “Low Cycle Fatigue Reliability Evaluation of Lead-Free Solders,” Nippon Kikai Gakkai Zairyo Rikigaku Bumon Koenkai Koen Ronbunshu, 2005, pp. 475- 476.
- The Society of Materials Science, “Factual Database on Creep and Creep-Fatigue Properties of Sn-37Pb and Sn-3.5Ag Solders,” The Society of Materials Science, Japan, 2004.
- H. Iwasaki, K. Hisano and T.Takamatsu, “Thermal Prolem of Next Generation Semiconductor Power Devices,” Nippon Kikai Gakkai Nenji Taikai Koen Ronbunshu, Vol. 6, 2003, pp. 251-252.