Energy and Power Engineering, 2013, 5, 28-35 doi:10.4236/epe.2013.53B007 Published Online May 2013 (http://www.scirp.org/journal/epe) A Space Vector Modulation Based Three-level PWM Rectifier under Simple Sliding Mode Control Strategy Azeddine Draou, Senior Mieee Department of Electrical Engineering, University of Hail, Hail, Kingdom of Saudi Arabia Email: adraou@yahoo.com Received 2013 ABSTRACT In this paper, a voltage oriented control strategy for three-level PWM rectifier based on Sliding Mode Control (SMC) is introduced in order to obtain fast and accurate response of dc-bus voltage. To verify the validity of the analysis and the feasibility of the proposed control method a set of simulation tests have been conducted using Matlab/Simulink. The simulation results show that compared to the conventional PI controller, the SMC can reduce drastically the three-level rectifier’s voltage fluctuation and improve the dynamic response of dc-bus significantly. Keywords: Three-level; PWM Rectifier; Voltage Oriented Control; Sliding Mode Control; Unbalanced Input Voltage 1. Introduction Recent development of high-power and high switching frequency power electronic devices and their large-scale application have led to the study of converter systems performing near unity power factor and digital imple- mentation. This new wave of research has paved the way to eliminate the power grid pollution and provide green power requirements. Thus, research interest in three- phase pulse with modulation (PWM) rectifiers has grown rapidly due to their numerous advantages such as bidi- rectional power flow, low harmonic distortion of source current, near unity power factor, and adjustable dc-bus voltage [1-14]. Moreover, the three-level neutral point clamped (NPC) converter presents more advantages over the conventional two-level converter in high power ap- plications, such as lower voltage stress of semiconduc- tors, smoother waveform, less distortion and less switch- ing frequency stresses [15,16]. The PWM rectifier based on three-level NPC technique is an attractive method suitable for high power applications since it provides the merits of both PWM rectifier and three-level converter. The most prevalent control scheme for PWM rectifier is the voltage oriented control (VOC) [17], which is im- plemented by PI controllers for inner current control and outer voltage control loops. The outer voltage loop is traditionally implemented by fixed-gain proportional- integral (PI) or proportional-integral-derivative (PID) controller. However, the design of such a controller de- pends on the precise system mathematical model used which is difficult to develop. Recently, much attention has been given to a sliding mode controller (SMC) in order to overcome the above drawbacks. (SMC) is a discontinuous system, and the control character can force the system to move in tiny extent and in high frequency according to the specified state track under certain conditions. Because of the mer- its of high speed response, insensitivity to the variable parameters, and ease of implementation, the SMC has been widely used in the non-linear system. In this paper, a simple control strategy for three-level PWM rectifier with voltage oriented control to improve the system’s robustness and dynamic response of the dc- bus voltage is proposed. The sliding mode control is used in the outer voltage loop. In order to improve the dy- namic performances of the source current loop, the anti- windup IP controller of inner current controller is used instead of the conventional PI controller [18-21]. Simula- tion results show that compared to the conventional PI controller, the SMC can reduce the three-level rectifier’s voltage fluctuation and improve the dynamic response of the dc-bus significantly. 2. Topology and Mathematical Model of Three Level PWM Rectifier The input of the rectifier is connected to the power net- work, and the output is in the dc side. The main objective of the control strategy of the rectifier is to make the input current follow a sine wave and the output voltage to be a controllable dc voltage. The topology of the three-level PWM rectifier is shown in Figure 1, [22-24]. L and R are the equiva- lent inductance and resistance of the three phase reactor inserted between the grid source and the rectifier, 1dc C Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 29 and 2dc are the dc-bus capacitances, 1dc V and 2dc V are voltages of the two capacitors, is the sum of 1dc and 2dc V. i, i and vi are the three- level grid voltage, grid current and ac-side voltage of the rectifier, respectively. Assuming that ip C dc V ,,abcVe ii , id , in (i) are the switching variables of the three level PWM rectifier when the three phases of power source voltages (bc ee ) are sinusoidal and symmetrical. Then, they can be defined according to different switch states of the four switches in each phase as: ,,abc 1 ip 0 ip 0 ip e s 4i Ss 4i Ss 2i S ,, a io s 0i s 0i s e 0 1 0 , , , when , on and , off. 0 0 in s in s in s 1iS 2i 3i S S S 2i 3i S 4i S 3i S 1i S 1i S , , , when , on and , off. , , , when , on and , off. 1 Assuming that the three phase source voltages are balanced, sinusoidal and symmetrical, the phase angle of voltage a is , denotes the RMS value of the source phase voltage, thus E 3 3 2cos 2cos 2 2cos 2 eE eE eE a b c (1) The transformation equation from ab coordinates to static c dq coordinates and then to synchronous rotating coordinates are 11212 2 a b c 2 303 23 x x d q x (2) cos sin sin cos x (3) According to “equation (1)”, 0 abc eee (4) In the three- phase inverter- wire system 0 abc iii (5) s L s R a e ~ a i 1dc C L R b i c i a S1 s L b e ~ s L c e ~ s R s R 2dc C 1dc V 1dc V 2C i 1C i N P a S2 a S3 a S4 o i p i n i Figure 1. Topology of three-level PWM rectifier. Therefore, “equation 2” is simplified to “equation 6” in order to reduce the number of current sensors and im- prove the quality of voltage. 10 3 21323 a b x x (6) After some tedious mathematical processes on the above equations, the mathematical model of the system in static abc coordinates is as follows: xAxBe (7) where 12 12 22 '' '' '' 11111 00 00 00 00 00 sssdc dc T abc dcdc T abc sapp sbppbn scppcnn ap bp cp an bn cn ZdiagLLLC C xiiiv v Bdiag eeeeii ann n ss ss ss ss A ss ss sss sss and '' , 33 ap bp cpan bn cn pn sss ss ss The physical meaning of the mathematical model in coordinates is pellucid, but variable parameters of ac reactors are unstable which is not suitable for the de- sign of control system, so the mathematical model in the rotating abc dq coordinates is: ''' xAxBe (8) where ' 12 12 ' 11 1 1 00 00 s sdcdc T d qdcdc T dqLL sdpdn sqpqn dp qp dn qn ZdiagLLC C xiivv Bdiag eeeii RLss Rss Ass ss If we suppose that and are the voltages of d vq v Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 30 d-axis in the coordinates, it can be shown that: dq ve ve dc ddsqs sd qqsds sq Li LsRi LiLsRi (9) where, s is the arithmetic operator of differential coeffi- cient. Considering , then 12dc d CCC 2 dc dc ddpdn dqpqn q dv v sissi dt R Cs ,, abc e d i * q v (10) From the aforementioned model, the equivalent circuit of the three-level PWM rectifier in the coordi- nates can be obtained as shown in Figure 2. dq 3. Control Strategy for the Three-level PWM Rectifier Based on SVPWM Similarly to the two-level PWM rectifier [26-34], the control target of the three-level PWM rectifier is to make the dc output voltage dc follow its reference value , while keeping the input currents () approximately sinusoidal and in phase with the corresponding grid voltages (). v* dc v ,, abc iii ee Furthermore, to ensure the reliability of the system [35] the two special requirements of three-level PWM recti- fier: balance of neutral-point voltage and avoidance of excessive voltage jump in phase and line-to-line voltages must be satisfied. Voltage oriented control (VOC) which is the classical and most popular control strategy for the three-level PWM rectifiers [32] provides excellent steady-state per- formance, acceptable dynamic performance and constant switching frequency for the rectifier compared with other strategies. The block diagram scheme of VOC strategy based on sliding mode control for the three level PWM rectifier is illustrated in Figure 3. There are three control loops in the VOC strategy. The error between the reference dc-bus voltage and the sampled dc-bus voltage dc is processed by SMC, which produces the reference active current . As in the inner loops, -axis currents loop and -axis current loop use anti-windup IP controllers to make the actual currents and q) track their reference values ( and ). Generally, and in order to achieve near unity power factor condition, the controlled value of the q-axis current is set to zero. * dc v * d i v q (d i* d i * q i Then, the errors are processed in two conventional anti-windup IP controllers to produce the output signals of and , after coordinates transformation, * d v* v and * v which can be obtained and used to produce switching signals and c by three-level space vector pulse with modulation (SVPWM). , ab SS , a e S As shown in Figure 3, in the three-level PWM grid phase voltages (), two grid phase currents ( b e,ii ) and two dc-link voltages () are sampled. 1 , dc dc vv 2 3.1. Sliding Mode Control Design of the Output Voltage Loop The main goal of the voltage control of the rectifier is keep the output voltage constant, ripple of the voltage small, and overshoot small and the regulation course short during transient conditions. 1dc C L R ddpis 2dc C 1dc V 2dc V 2C i 1C i o i p i n i N P ddnis sqqpi qqni s qsiL s R d e d v s L d i dsiL s R q e q v s Lq i (a) (b) Figure 2. Equivalent circuit of the three-level PWM recti- fier in d - q coordinates. * dc v q i dc v 0 * q i a r * d i d i s L + abc SVPWM - Antiwindup IP a e b e SMC s L * v 1dc V Three-level rectifier 2dc V dq a i b i b c dq * v Antiwindup IP p i n i d e q e + - - - + + + + - - + + + - a S b S c S * d v * q v q i d i Figure 3. Three-level rectifier control system. Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 31 There are two external variables (dc and q ifor the three-level PWM rectifier, where dc is determined by v v d , and q is controlled by q i . Considering dc v and q as contestable output variables, standard state space can be obtained as i 1 2 2 q s dq dc sss q dc dd qqL d s R iiv e LLL i d vsi sii dt C q (11) Substituting the error between reference and fact vari- able into “equation (10)”, then 111qdc iq vdc yE xtzEsv e d e e dt (12) where, , , refdc ref iqiqq vdcdc eiie vv and ref e So, it can be concluded that selecting the two follow- ing sliding surfaces, the stability and robustness of the system can be achieved: 10 iqiq ref eiqe qq ske kii (13) 21 20 dc dc dc dc v vv de de ske ke dt dt v (14) By combining the above equations, then 2 can be rewritten as 2 2 2 dd qq dc L dcref dcdd dc d dcrefdcLq qd d si si dv i sv vdtC C dv C vv isi dt Cs d i (15) In coordinates, dq3 dRMS , , in the ideal sliding mode state, eu0 q e q can be calculated and sim- plified as 2 d qdc Li sv (16) Similarly, the output voltage dc will follow the ref- erence accurately, and based on the principle of power balance, v * dc v d is obtained as: 3 dsd RMSsd ddc dc eRiu Ri svv (17) By substituting “equation (16)” and “equation (17)” into “equation (15)”, “equation (18)” can be deduced as 2 2 0 3 sdq dc dcref dcL ddc ddcd RMSs d Lii dv svv i dt Cv Cv i uRi (18) Therefore, d and q will not be relevant to the choice of sliding mode surface, and the sliding mode surface can be obtained as 10 iqiq ref eiqeqq ske kii (19) 20 ref dd si i (20) From “equation (18)” and “equation (20)”, the control rule for the outer voltage loop can be described as 2 3 dc drefdcrefdcL d ddc RMSs d dv ivvdt C Cv uRi i (21) The block scheme of the VOC strategy based on SMC for the three-level PWM rectifier is shown in Figure 3. The error between reference dc-bus voltage and the sampled dc-bus voltage dc is processed by SMC, which produces the reference active current . and , (for unity power factor control, ) are compared with the measured grid current, d and q, respectively. Then, the errors are processed in two anti-windup IP controllers to produce the output signals of and , after coordinates transformation, * dc v * d i * q v v * d i * q i*0 q i i * v i * d v and * v that can be obtained and used to produce switching signals a, b and c by the three- level space vector pulse width modulation (SVPWM). S S S 3.2. Three-level Space Voltage Vector Modulation Algorithm There are 27 output voltage vectors in the three-level VSI as shown in Figure 4. In Figure 5, suppose the desired reference voltage vector lies in the triangle B which is in the first 60° sector (sector I). Then, the function time of each output voltage vector should be calculated first as well as the corresponding time for the power devices to turn on or turn off. The desired output voltage vector consists of 13 and 4 by the adjacent three vector compounding prin- ciple. Based on the volt-second balancing principle [36]: ,VV V 21 sin3 2sin 31 2sin as bs cs TTk TTk TkT (23) where, 3 ref kV is the modulation depth, T is the Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 32 system sampling control cycle, ref and V is the am- plitude and angle of the reference voltage vector . ref In the same way, the function time of the adjacent three-vectors could be fixed when it lies in the triangle A, C and D. The vector function time of the other five vec- tors could be deduced in a symmetrical manner. V According to the function time of each vector and the centro-symmetric vector sending sequence, the three phase output vectors sequential chart could be fixed when the reference vector ref lies in the triangle A, B, C and D in sector I, which also gets the space voltage vector modulation mode. V There are some similar SVPWM modes when the ref- erence vector lies in other vectors. According to the SVPWM mode and the function time of each vector cor- responding to each sector, the power devices driven sig- nal of the three phase arms could be obtained to control the three-level inverter in SVPWM mode. PON PNO ONN POO N OPN NPN OPO NON NPO NPP OPP NOO NOP OOP NNO ONP NNP PNN PPO OON PP POP ONO PNP Figure 4. Space voltage vectors in three-level rectifier. PO N N N ON POO PPO OON PPN 0 V 1 V PN 3 V ref V b T a T a T b T c T 2 V 4 V 5 V c T A B C D PPP OOO NNN Figure 5. Synthesized reference vector in the first 60° sec- tor. 4. Simulation Results To validate the proposed control scheme proposed in this paper, a series of simulation tests have been conducted under Matlab/Simulink environment. The main parame- ters of the simulation system are given in Table 1. Figure 6(a) shows the DC voltage and current wave- forms where the DC output voltage reaches the given stable value (250 V) of the voltage in a short time. Fig- ure 6(b) shows the grid phase voltage (a e) and current (a i) waveforms. It can be seen that the grid current is in phase with the grid voltage, and the power factor is higher than 0.997. Table 1. Rectifier parameter. The input phase voltage 125 V The Power source frequency 50 Hz The input inductance 37 mH The input resistance 0,3 Ω DC-bus capacitor 1100μF DC-bus voltage 250 V (a) Output voltage and current (b) Grid source side voltage and current Figure 6. Simulation results of system. Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 33 Figure 7 shows the simulation results when the load changes from 500 Ω to 750 Ω at t = 0.4 s. Figure 7(a) shows the output DC voltage and current waveforms when the load and input voltage fluctuates, the system can adjust to the desired value of the voltage in a short period of time. Figure 7(b) shows the waveforms of the grid source side current, the current always maintains unity power factor in the dynamic process. Moreover, in view of the actual operating conditions, there are more or less fluctuations of the three-phase in- put voltage especially three-phase input voltage unbal- ance in the operation of the circumstances. Figure 8(a) shows unbalanced three-phase input voltage in the sys- tem, single-phase unbalance is up to 20%, DC output voltage fluctuations is less than 0.2 V as shown in Figure 8(b). To validate the superiority of SMC over conventional PI controller, comparative simulations are conducted and the results are shown in Figure 9. Figure 9(a) shows the waveform of the dc-bus voltage under conventional PI controller while Figure 9(b) is that of SMC. It can be seen clearly that the overshoots of the dc-bus voltage for the rectifier with PI controller is much higher than that with SMC, and the dynamic performance of the system is improved significantly. (a) Output voltage and current (b) Grid source side current Figure 7. Simulation waveforms at load changes. (a) Three-phase input voltage fluctuations (b) DC output voltage waveform Figure 8. Voltage unbalance at the DC output waveforms. (a) dc-bus voltage with conventional PI (b) dc-bus voltage with SMC Figure 9. DC output voltage waveforms. Copyright © 2013 SciRes. EPE
A. DRAOU, S. MIEEE 34 5. Conclusions The problem of the voltage control system of the three- level rectifier is thoroughly analyzed and presented in this paper. Through the study on the voltage equation of the rectifier, the nonlinear characteristic of the voltage control is carefully discussed and detailed based on a new strategy which uses sliding mode control (SMC). The proposed control strategy is adopted for the dc bus voltage control to obtain better dynamic performance based on the presented mathematical model. Simulation results which are included in this paper, indicate that the unity power factor is achieved and the proposed scheme exhibits better dynamic and steady state performance than conventional controller. 6. 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